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| download [PROM/R1] (without image check)downloaderase
(erase flash)erasecopy (support flash <-> sdram)copymemset
(clear memory, only support sdram)memseteb
... (write memory in 8bit)ebew
... (write memory in 16bit)ewed
... (write memory in 32bit)eddb | db | db - ( 8bit show)dbdw | dw | dw - (16bit show)dwdd | dd | dd - (32bit show)ddj
(jump to 'address' and run)jreboot (reboot system)reboottestkey (test key)testkeyhistory (show command history)historycls (clear screen)clsquit (exit shell)quithelp (show help information)help? (show help information)? %-10s : %s %s %s>PROM-0.01 %s %s %s%c%s Invalid command, type '?' or 'help' to get help. ******************************************************************************** * SHELL *EFFFFFFFFFFF4EFFFFEFFFFFFFFFFhFEFFEHH̀HԀH܀HIIIHIIH%3d %%' Z-Modem: Establishing Connection with Sender ... Z-Modem: Can't Establish Connection with Sender !! Z-Modem: Closing this Connection Z-Modem: Cleanup and Exit.D1A1D2A2D3A3B1D0llDlllԀmm4mdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdmdltlltltlԀmm4DES-3016DES-3010FLDHS-3018DHS-3026DHS-3010GDHS-3010FDES-3018DES-3026DES-3010GDES-3010FDES-3226LAllFlshflash/000dhmRx QoS Packet Octet CounterRx QoS Packet CounterRx Symbol Error CounterRx Excess Size Disc CounterRx Fragment CounterRx SA Change CounterRx Broadcast Packet CounterRx Multicast Packet CounterRx Unicast Packet CounterRx Drop Packet CounterRx Good Packet Octet CounterRx FCS Error CounterRx Alignment Error CounterRx Jabber Packet CounterRx Over Size Packet CounterRx 1024 to 1522 Bytes Octets CounterRx 512 to 1023 Bytes Octets CounterRx 256 to 511 Bytes Octets CounterRx 128 to 255 Bytes Octets CounterRx 65 to 127 Bytes Octets CounterRx 64 Bytes Octets CounterRx Pause Packet CounterRx Under Size Packet Octets CounterRx Packet Octets CounterTx QoS Packet Octets CounterTx Pause Packet CounterTx Fram IN Disc CounterTx Excessive Collision CounterTx Late Collision CounterTx Deferred Transmit CounterTx Multiple collsion CounterTx Single Collision CounterTx Collision CounterTx Unicast Packet CounterTx Multicast Packet CounterTx Broadcast Packet CounterTx QoS Packet CounterTX Drop Packet CounterTx OctetsMST Table Enable RegistersCHIP 0 PORT-BASE Ageing Control RegisterAgeout Enable VID RegistersMST Control RegistersPre-Port-Base Broadcom/Multicast Storm SupprePort Engress Rate Control Configuration RegisPort Ingress Rate Control Configuration RegisCommon Ingress rate Control Configuration RegPort Dynamic Learning Threshold RegistersPort Current SA Count For Dynamic Mode RegistMAC Address Security Control Registers 2MAC Address Security Control Registers 4MAC Address Security Control Registers 3MAC Address Security Control Registers 1MAC Address Security Control Registers 0EAP Destination IP RegistersEAP Global Configuration RegistersPort EAP Configuration RegistersPriority Remap Registers802.1Q Default Port Tag Registers802.1Q VLAN Control 5 Registers802.1Q VLAN Control 4 Registers802.1Q VLAN Control 3 Registers802.1Q VLAN Control 2 Registers802.1Q VLAN Control 1 Registers802.1Q VLAN Control 0 RegistersTrunk Group 1 Control RegisterTrunk Group 0 Control RegisterGlobal Trunk Control RegisterPORT X VLAN RegisterDiffServ DSCP Priority Register 2DiffServ DSCP Priority Register 1M-Type Priority RegisterR-Type Priority RegisterT-Type Priority RegisterD-Type Priority RegisterQoS TOS/DiffServ Control RegisterPriority Threshold RegisterQoS Pause Enable RegisterQoS TOS/DiffServ Enable RegisterQoS 802.1P Enable RegisterQoS Control RegisterQoS Queue Montor Control RegisterBroadcom Test RegisterAuxiliary Multiple PHY Register10BASE-T Auxiliary Error And General Status RAuxiliary Mode 2 RegisterAuxiliary Status Summary RegisterAuxiliary Control/Status Register100Base-X False Carrier Sense Counter Registe100Base-X Receive Error Counter Register100Base-X Auxiliary Status Register100Base-X Auxiliary Control RegisterLink Partner next Page RegisterAuto-Negotiation Next Page RegisterAuto-Negotiation Expansion RegisterAuto-Negotiation Link Partner (LP) Ability ReAuto-Negotiation Advertisement RegisterPHY ID LOW RegisterPHY ID High RegisterMII Status RegisterMII Control RegisterGiga Port SGMII CRC16 RegisterGiga Port Link Partners Link Status RegisterGiga Port SGMII Status RegisterGiga Port SGMII Control RegisterSGMII clear control RegisterMR Status RegisterPRBS Status RegisterPRBS Control RegisterTBI Control RegisterMIBDIGA RegistersBcst Threshold Drop RegisterDLF Threshold Drop RegisterReceived Base Flow Control RegisterReserved Buffer Number RegisterQueue 3 TxDsc Control 3 RegisterQueue 3 100TX Threshold Control 2 RegisterQueue 3 100TX Threshold Control 1 RegisterQueue 2 TxDsc Control 3 RegisterQueue 2 100TX Threshold Control 2 RegisterQueue 2 100TX Threshold Control 1 RegisterQueue 1 TxDsc Control 3 RegisterQueue 1 100BT Threshold Control 2 RegisterQueue 1 100BT Threshold Control 1 RegisterQueue 0 TxDsc Control 3 RegisterFlow Control Register 8Flow Control Register 6Flow Control Register 1Flow Control Register 0Miscellaneous Tx Flow Control RegisterStrict High Queue Preempt Control Register 1Strict High Queue Preempt Control Register 0Flow Control Status Register 13Flow Control Status Register 12Flowcon Space Register 2Flowcon Space Register 1MON Flowcon Reg Bus RegisterPre-Queue Tx-Drop Control RegisterCPU/MII Threshold Control RegisterGlobal Flow Control RegisterFlow Control Status Register 11Flow Control Status Register 10Flow Control Status Register 9Flow Control Status Register 7Flow Control Status Register 5Flow Control Status Register 4Flow Control Status Register 3Flow Control Status Register 2Transmit Queue Threshold Control RegisterGlobal Threshold Control 2 RegisterGlobal Threshold Control 1 RegisterQueue 0 100TX Threshold Control 2 RegisterQueue 0 100TX Threshold Control 1 RegisterFlowcon Diagnosis Control RegisterDiagnosis RegistersGlobal descriptor Data RegistersGeneric Memory Access RegistersGeneric Memory Read/Write Control RegisterMIB Kill Control RegisterFM Memory Read/Write Data 1 RegisterFM Memory Read/Write Data 0 RegisterFM Memory Read/Write Control RegisterBUFCON Memory Read Data 1 RegisterBUFCON Memory Read Data 0 RegisterBUFCON Memory Read Control RegisterVID Entry 1 RegisterVID Entry 0 RegisterARL Search Result VID RegisterARL Search Result MAC RegisterARL Search Address RegisterARL Search Control RegisterARL Eetry 1 RegisterARL Entry 0 RegisterVID Table Index RegisterMAC Address Index RegisterARL Read/Write Control RegisterARL Spare 3 RegisterARL Spare 2 RegisterARL Spare 1 RegisterARL Spare 0 RegisterSecure Destination Port Mask RegisterSecure Source port Mask RegisterMultiport Vector 2 RegisterMultiport Address 2 RegisterMultiport Vector 1 RegisterMultiport Address 1 RegisterBPDU Multicast Address RegisterGlobal ARL Configuration RegisterChip Revision ID RegisterSpecial Management Control RegisterEgress Mirror MAC Address RegisterEgress Mirror Divider RegisterEgress Mirror Control RegisterIngress Mirror Mac Address RegisterIngress Mirror Divider RegisterIngress Mirror Control RegisterMirror Capture Control RegisterRMON MIB Steering RegisterAging Time Control RegisterManagement Port ID RegisterGlobal Management Configuration RegisterPause Status Summary RegisterDuplex status SummaryRegisterPort Speed Summary RegisterLink Status Change RegisterLinkStatus Summary RegisterBIST Status Register10/100/1000 Port Control RegisterMII Port Control Register10/100 Port Control RegisterMII Giga Port Scan Result RegisterMII Giga Port States Override RegisterMII Port Override RegisterMII Port N States Override RegisterGiga Port RGMII TIMING DELAY registerLED3 Status registerLED2 Status registerLED1 Status registerLED0 Status registerLED Flash control registerSPARE_REG2SPARE_REG1SPARE_REG0Strap Status RegisterSortware Flow Control RegisterProtected Port Select RegisterMulticast LookupFail Forward Map RegisterUnicast Lookup Fail Forward Map RegisterWAN Port select RegisterRegulator Output Voltage Trim Control RegisteScan Timeout RegisterDebug Status RegisterDebug Control RegisterPower Down Mode RegisterNEW Control RegisterPHY Scan Control RegisterSwitch Mode RegisterSPI polling MDIO START : timeout SPI polling RACK : timeout GPIOȀ**|hd(PH*X( ) D'l𿼀pxt؀0,@! 𾨀𾤀"(hd#0( ܀Ԁ$8𽐀𽈀%dX& (p̀Ā'̀prom 0123456789ABCDEF??,! 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